Compared to standard desktop PCI, CompactPCI supports twice as many PCI slots (8 versus 4) and multiple bus segments are allowed with bridges. This system architecture offers a packaging scheme that is much better suited for use in industrial applications. For example, Compact PCI cards are designed for front loading and removal from a card cage. The cards are firmly held in position by their connector, card guides on both sides, and a face plate which solidly screws into the card cage. Cards are mounted vertically allowing for natural or forced air convection for cooling. Finally, the pin-and-socket connector of the CompactPCI card is significantly more reliable and has better shock and vibration characteristics than the card edge connector of the standard PCI cards. CompactPCI utilizes the Eurocard form factor made popular by the VME bus, defined for both 3U (100mm by 160 mm) and 6U (160mm by 233 mm) card sizes.
The connectors pin assignments are standardized by the PICMG. Unlike the original Eurocard solutions such as VME, which use connectors with a 0.1 inch (2.54 mm) pin spacing, CompactPCI cards use metric connectors with a 2-millimeter pin spacing, designed to the IEC 1076 standard. 3U boards have a 110-pin connector (J1), which carries the 32-bit PCI bus signals, and an optional 110-pin connector (J2), which carries either user-defined I/O or the upper 32 bits of an optional 64-bit PCI bus. 6U cards have an identical J1, a J2 that is always used for 64-bit PCI, as well as J3, J4, and J5 connectors for a variety of uses either as user-defined I/O. Hot-plugging is a supported feature of CompactPCI. Some of the pins are slightly longer to provide proper grounding when devices are inserted and removed.
The backplanes can be designed for 3.3 V V(I/O) or 5 V V(I/O) operation. These are differentiated by having ‘Cadmium Yellow’ coloured key for 3.3V or ‘Brilliant Blue’ colour for 5V operation. If the CompactPCI card operates on a particular voltage, the card shall have the respective coloured coding key. If the card is compatible with both voltages then it may not have any coding key. The image illustrates a 5 V V(I/O) 8-slot backplane.
3U CompactPCI processor boards use a single 220 pin connector for all power, ground, and all 32 and 64 bit PCI signals. This connector is composed by two halves – the lower half (110 pins) is called J1 and the upper half (also 110 pins) is called J2. Twenty pins are reserved for future use. Backplanes use male (pin) connectors and plug-in boards use female (socket) connectors. Plug in boards that only perform 32 bit transfers can use a single 110 pin connector (J1). 32 bit boards and 64 bit boards can be intermixed and plugged into a single 64 bit backplane.
6U boards can have up to three additional connectors with a total of 315 pins. These are also 2mm style. These optional connectors can be used for a variety of purposes. They can be used as to bridge to other buses in hybrid backplanes. These hybrid backplanes use CompactPCI for the processor and high speed peripheral section and one of these industrial buses for an I/O expansion section. These connectors, in conjunction with commercially available PCI-PCI bridge chips, can also be used to extend the CompactPCI bus in 8 slot increments. In this manner a CompactPCI system with 16, 24 or even 32 slots can easily be fabricated.
The connectors can also be used for rear panel I/O. This approach, popular in the telecommunications industry, brings I/O wiring out the rear of the chassis. Eliminating front panel wiring can reduce the time required to replace a module in critical applications. The IEEE 1101.11 standard for rear panel I/O provides a standard method for doing this with CompactPCI.
|Description||Nominal Value||Tolerance (2)||Max Ripple (p-p)|
|+5 VDC||5.0 V||+5% / -3%||50 mV|
|+3.3 VDC||3.3 V||+5% / -3%||50 mV|
|+12 VDC||12.0 V||±5%||240 mV|
|-12 VDC||-12.0 V||±5%||240 mV|
|PCI I/O Buffer Voltage||5.0 V or 3.3 V||+5% / -3%||50 mV|
CompactPCI was initially ratified as PICMG 2.0 in late 1995 as a passive backplane for PCI signaling. The 2.x series of specifications from PICMG provide support for a variety of technologies including Hot Swap (PICMG 2.1), Telephony signaling (PICMG 2.5) and most notably the expansion of the architecture to include switched Ethernet (PICMG 2.16). The PICMG 2.16 version of CompactPCI defined the industry’s first switched fabric Ethernet backplane architecture that allowed more than a dozen processor boards to be interconnected as a local high speed LAN in a single chassis.
A Packet Switching Backplane (PSB) is composed of Node Slots, Fabric Slots, and the Links that interconnect them. The PSB topology is a star and each line interconnecting a Node Board and Fabric Board represents a Link that is a 10/100/1000 Mbps full-duplex Ethernet connection. Node Boards communicate by transferring/receiving packets to/from the Fabric Board, which transfers the packet to/from one or more Node Boards. Thus, every Node Board can communicate with every other Node Board.
After adding a second switch to the system and a second Link Port to each Node the configuration is named “dual star”. Two Link Ports of a single Node Board are wired to each of the two Fabric Boards.
PICMG 2.16 – Packet Switching Backplane rev 1.0:
- Very high speed (Ethernet @10/100/1000 Mbps)
- Two type of slots: o Node Board (max 19 slots) o Fabric Board (min 2 slots)
- Large bandwidth available
- Reliability with the redundancy
- High MTBF (no cables and connectors)
- Easy SW integration (TCP/UDP communication, …)
|cPCI (classic)||cPCI (PICMG 2.16)|
|PCI bus||Embedded-standard Ethernet with PCI|
|Control-centric||Control and Application|
|No Ethernet Link on Backplane||10/100/1000Mbps Ethernet|
|IPMI over IPMB management||IPMI over LAN management|
|Proprietary RSS and compact-net||IP clustering, RSS, chassis failover|
|cPCI board form 6u x 160mm||cPCI board form 6u x 160mm|
|.8″ slot pitch – 21 slot max in 19″ rack||.8″ slot pitch – 21 slot max in 19″ rack|